| Japanese | English |
21st LSI Design Contests・in Okinawa Design Specification - 4
4．Challenge
- Outline of hardware design PDF file：Hardware Design outline
- Verilog-HDL file for simulation Verilog-HDL file (updated on 2017/12/22) ：Verilog file for simulation_ver2.1
- Continuation for outline of hardware design PDF file (updated on 2017/11/10) ：Hardware Design outline
Verilog-HDL file (updated on 2017/11/10) ：Verilog file for simulation_ver2
Verilog-HDL file (updated on 2017/10/23) ：Verilog file for simulation_ver1
Tutorial PDF file：Tutorial to run the verilog file with ISE Design suite
Tutorial - PDF-fileTutorial to run the verilog file with Vivado 2017.3
Explanation for experts level
PDF file (updated on 2017/11/20) ：Challenge for experts level
<<Back
Next>>
Copyright (C) 2017-2018 LSI Design Contest. All Rights Reserved.